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I’m trying to create a minimal Makefile that builds an executable from a single C-file, and links it with some libray:
LDLIBS = -lbar
.PHONY: all
all: foo
With foo.c
present, this will do the following:
$ make
cc foo.c -lbar -o foo
Unfortunately, this doesn’t work with modern linkers that try to reduce the dependencies by only linking in libraries that have symbols that were referenced before (that is: in arguments left of the -l...
).
The correct invocation should thus be:
cc foo.c -o foo -lbar
Checking with make -d
, I see that the pattern rule for building executables from C-sources is like this:
%: %.c
$(LINK.c) $^ $(LOADLIBES) $(LDLIBS) -o $@
Of course I could define my own pattern rule, like so (dumping the deprecated LOADLIBES
while there):
%: %.c
$(LINK.c) $^ -o $@ $(LDLIBS)
but why isn’t this the default?
So my question is: why is LDLIBS
not added after the -o ...
?
Should I use some other variable for automatically adding libraries?
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